Keynote Speakers
Prof. Andrei Vladimirescu
IEEE Fellow
University of California at Berkeley, CA, USA
Biography: Andrei Vladimirescu (F’17) received the M.S. and Ph.D. degrees in EECS from the University of California at Berkeley, Berkeley, CA, USA.,He was a key contributor to the SPICE simulator at the University of California at Berkeley, releasing the SPICE2G6 production-level SW in 1981. He pioneered electrical simulation on parallel computers with the CLASSIE simulator as part of his Ph.D. He has authored a book The SPICE Book (J. Wiley, 1994). For many years he was the Research and Development Director leading the design and implementation of innovative software and hardware Electronic Design Automation products for Analog Devices Inc., Daisy Systems, Analog Design Tools, Valid Logic, and Cadence Design Systems. He is currently a Professor involved in research projects with the University of California at Berkeley, the Technical University of Delft, Delft, The Netherlands, the Institut Supérieur d’Electronique de Paris, Paris, France, and a Consultant to industry. His current research interests include in the areas of ultra-low-voltage CMOS, design, simulation and modeling of circuits with new devices and circuits for quantum computing.
Title: Quantum Computing 2026: Are we there yet?
What started 45 years ago as a visionary discovery for the future of computing while at the time raising eyebrows whether a joke or breakthrough, Quantum Computing has returned along with Artificial Intelligence, to the limelight as the hottest technology areas with great industrial application potential.
This talk will first take a look at the Quantum Computing ecosystem , companies, applications, financial outlook; the technology advances of different players, their selected hardware choices and roadmaps will be summarized.
The foundation of a quantum computer, the qubit with its key characteristics and the basic computer architecture are introduced first. The core of the presentation will focus on the stateof-the-art of spin-qubit technology and the design and implementation challenges of a quantum processor including its control electronics. A path to the integration of core computation and qubit control as well as processor scalability to the required qubit capacity, will be analyzed from the perspective of the potential of Nano-CMOS as integration platform.
The presentation will conclude highlighting the advances of the last decade and assessing how close or far Quantum Computing is today to becoming a mainstream computation paradigm.
s
Prof. Chua-Chin Wang
Chair of IEEE Circuits and Systems Society (CAS-S), Tainan Chapter
National Sun Yat-Sen University, Taiwan
Biography: Chua-Chin Wang (SM'04) was born in Taiwan, in 1962. He received the B.S. degree in electrical engineering from National Taiwan University, Taipei, Taiwain, in 1984, and the M.S. and Ph.D. degrees in electrical engineering from State University of New York at Stony Brook in 1988 and 1992, respectively.,He then joined the Department of Electrical Engineering, National Sun Yat-Sen University, Kaohsiung, Taiwan, and became a Full Professor in 1998. His recent research interests include mixed-signal circuit design, low-power and high-speed circuit design, communication interfacing circuitry, and bio-chips. He founded SOC group in Department of Electrical Engineering, National Sun Yat-Sen University in 2005. He is currently serving as the Director of Engineering Technology Research and Promotion Center (ETRPC), National Sun Yat-Sen University.,Dr. Wang is the Chair of IEEE Circuits and Systems Society (CAS-S), Tainan Chapter. He is also the founding Chair of IEEE Solid-State Circuits Society (SSCS), Tainan Chapter, and the founding Councilor of IEEE NSYSU Student Branch. He is also a member of the IEEE CASS Multimedia Systems Applications (MSA), VLSI Systems and Applications (VSA), Nanoelectronics and Giga-scale Systems (NG), and Biomedical Circuits and Systems (BioCAS) Technical Committees. Currently, he is also serving as the Associate Editor of International Journal of VLSI Design. He is also a Guest Editor of International Journal of Electrical Engineering. In 2007, he was elected to be IEEE CAS-S Nanoelectronics and Giga-Scale Systems (NG) Technical Committee Chair to serve a two-year term from 2008. In the same year, he was elected to be the DLP (Distinguished Lecturer Program) speaker of IEEE CAS-S. He was the General Chair of 2007 VLSI/CAD Symposium.
Title: AI Now and Memory to Help
As AI transitions evolves toward complex generative systems, the demand for computational power and memory bandwidth has escalated exponentially, leading to the "Power Wall", "Memory Wall", and “Heat Wall” challenges. This report highlights that as model parameters exceed 100 billion, conventional von Neumann architectures face severe efficiency bottlenecks due to frequent data movement between the processors and memory. To address these issues, the research focuses on Computing-in-Memory (CIM), also referred to as In-Memory Computing (IMC) or Processing-in-Memory (PIM). CIM technology minimizes data energy overhead by performing Multiply-Accumulate (MAC) operations directly within the memory array. The presentation also details a robust MAC accelerator design featuring a group of memory cells forming a crossbar, integrated with Ripple Carry Adder and Multipliers (RCAM) and Auto-Write-Back (AWB) mechanisms. Looking beyond current limitations, the presentation advocates for 3D Heterogeneous Integration and Chiplet-based architectures as the near-future solutions to transcend Moore’s Law. By integrating logic and memory in a 3D stack, systems can achieve higher bandwidth and lower power dissipation. The study concludes that the future of AI infrastructure lies in the synergy between efficient CIM hardware, integrated 3D-IC design platforms, and system-driven methodologies to support the next generation of generative AI, smart robotics, and multi-agent systems.
Invited Speakers
Assoc. Prof. Sylvain Eimer
Beihang University, China
Biography: Dr. Sylvain Eimer is a distinguished researcher and associate professor with extensive expertise in thin film deposition, spintronics, and nanotechnology. His work spans fundamental research and applied science, focusing on materials for advanced magnetic devices. Dr. Eimer earned his Ph.D. in Physics, specializing in materials physics and chemistry, from Sorbonne University in Paris. He also holds a master's degree in materials science and a DEST in industrial processes, complementing his bachelor's degree in mathematics and technology. His research has made significant contributions to nanoscience, nanotechnology, and the development of magnetic thin films and heterostructures. Over the course of his career, Dr. Eimer has held research positions at prestigious institutions, including the IPCMS laboratory at CNRS, GREYC laboratory in Caen, and the University of Paris-Saclay. Since 2020, he has been part of the Micro-Nano Science and Technology Research Center at Beihang University’s Hefei Innovation Research Institute, where his work focuses on developing spintronics devices and exploring irradiation techniques to optimize thin-film performance. In May 2024, he was appointed as an associate professor at the National Spintronics Key Laboratory in ZFAI Hangzhou, where he advances research in spintronic materials and devices.
Title: Beyond Silicon: Why Critical Minerals Will Define the Next Decade of Nanoelectronics
Every smartphone, autonomous vehicle sensor, and 5G base station depends on a handful of obscure mineral elements: gallium for high-frequency chips, indium for transparent displays, tantalum for microcapacitors, and rare earths for nanoscale actuators. These materials are not substitutes—they are irreplaceable. Yet their supply is concentrated in a few countries, their ores are rapidly depleting in grade, and recycling rates remain below 5%.
This short talk will map the periodic table of nanoelectronics, expose the three existential threats (scarcity, geopolitics, demand growth), and explore the emerging field of material-aware design—including urban mining, radical substitution (MoS₂, diamond semiconductors), and policy interventions. The conclusion is clear: the next revolution in nanoelectronics will be won or lost not in a cleanroom, but in a mine and a recycling plant.
Assoc. Prof. Tao Liang
Xi’an Jiaotong University, China
Biography: Tao Liang received the B.Sc. degree in electrical engineering and automation from Xi’an Jiaotong University, Shaanxi, China, in 2013, the double M.Sc. degrees in electrical engineering from Xi’an Jiaotong University and Politecnico di Milano, Milan, Italy, in 2016, and the Ph.D. degree (summa cum laude) in electrical engineering from Politecnico di Milano in 2019. He is currently an Associate Professor with the School of Electrical Engineering, Xi’an Jiaotong University. Dr. Liang is a senior member of IEEE, he has authored over 40 papers in peer-reviewed journals. He serves as Associate Editor for the IEEE Letters on Electromagnetic Compatibility Practice and Applications and Committee Member of the Chinese National Standardization Technical Committee (TC81, TC163). He was the recipient of the Young Scientist Award from the International Union of Radio Science (URSI), the Young Scientist Award at the Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC), and several best paper awards at international symposium, such as GlobalEM, AsiaEM, et al. His research interests include electromagnetic compatibility modeling and testing techniques, high power electromagnetics, and transmission line analysis, et. al.
Title: Figures of Merit for Quantifying Worst-Case IEMI Coupling Under Coupling-Path Uncertainties
This talk investigates the vulnerability of electrical systems to intentional electromagnetic interference (IEMI) attacks. To address worst-case coupling, we establish energy and bandwidth constraints and analytically derive the time-domain IEMI waveform that maximizes the peak response voltage at the victim equipment. The coupling link is then modeled via the phasor-domain Friis transmission equation. By incorporating random rotation and translation of the generator to model unknown relative placements, we propose the mean power gain as figure of merit to quantify system susceptibility accounting for coupling path uncertainties, which can be solved analytically solely from the radiation patterns of both generator and victim system. The research provides a theoretical framework and methodology for quantitatively evaluating equipment immunity against randomly coupled IEMI attacks.
Dr. Philippe Royannez
Intel Mobile Communication, Singapore
Biography: Dr. Royannez brings over three decades of international experience, having worked across the United States, France, Germany, Finland, and Singapore. Throughout his career, he has held key roles at leading semiconductor companies including Siemens, Infineon, Texas Instruments, ST-Ericsson, and Intel.
He has led research and development teams across multiple global locations, including Singapore, France, Beijing, and Bangalore, driving innovation in advanced semiconductor technologies. His expertise spans all aspects of System-on-Chip (SoC) design, with a particular focus on ultra-low-power digital design, for which he holds several patents.
Dr. Royannez is a Senior Member of the IEEE and earned his Ph.D. in Electrical Engineering and Computer Science from Université Pierre et Marie Curie.
Title: Deepfake Audio and Voice Threats: Risks and Countermeasures
In this presentation, we will examine the growing risks of identity theft, spoofing, and deepfake audio in a world where AI is becoming ubiquitous, yet not everyone fully understands the scale of the threat.
We will explore how these technologies can be misused, then present practical countermeasures to mitigate their impact. Interestingly, we will also demonstrate how AI itself can be leveraged to detect and combat deepfake audio.
Finally, we will conclude with a discussion on the roles of hardware versus software in implementing these solutions, highlighting approaches that are both effective and practical for real-world deployment.
Prof. Yongfu Li
Shanghai Jiao Tong University, China
Biography: Yongfu Li received the B.Eng. and Ph.D. degrees from the Department of Electrical and Computing Engineering, National University of Singapore (NUS), Singapore. He is currently an Associate Professor (tenured) with the School of Integrated Circuits, Shanghai Jiao Tong University, China. His research interests include analog/mixed signal circuits, biomedical signal processing, and circuit automation. He is an active volunteer in IEEE, where he served as Vice-President (2026-2027), Board of Governors (BoG), and R10 Member At Large (2023-2025, 2020-2021) of the IEEE Circuits and Systems (CAS) Society, an AdCom Members of the IEEE Biometrics Council (2024-2027), a member of the IEEE DataPort Steering Committee (2024-2026), Chair of the IEEE Data Competition Committee (2025-2026), Chair of the IEEE CASS Standard Activities Sub Division (2022-2025), and the IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Steering Committee (2023-2025). Throughout his career, he has earned numerous academic, industrial, and IEEE awards, including the IEEE MGA Larry K. Wilson Transnational Award (2025), IEEE EAB Society/Council Professional Development Award (2023), IEEE MGA YP Achievement Award (2022), and IEEE YP Hall of Fame Award (2021).
Title: Digital Auscultation for Cardiac and Respiratory Systems (IEEE Sensor Council Distinguished Lecture)
Inspection, palpation, percussion, and auscultation (IPPA) are the four key physical assessment methods for understanding a patient's condition. In particular, adventitious heart and respiratory sounds can be heard on auscultation of the anterior and posterior chest. However, auscultation requires extensive experience to determine the types of sounds heard. Furthermore, the inter-listener variability among physicians and the lack of quantitative measurements make lung auscultation a subjective process. Therefore, the digital stethoscope has been gradually adopted in several hospitals to provide digital recording, which can be used for further analysis. My talk will begin with an introduction to the auscultation of our cardiac and respiratory systems, followed by a discussion of heart and lung sounds. On this basis, we will review the different features of the digital stethoscope system and discuss how signal processing, machine learning, and deep learning models can improve the detection and classification of heart and respiratory sounds. Furthermore, in alignment with the student design contest, we hope to encourage more people to engage with this meaningful research topic.